FECT

Abstract: Differential power analysis (DPA) is the most powerful attacks to be considered in designing logic circuit for crypto device. In cryptographic algorithm such as AES, it includes four transformations and ten round computations to keep data secrecy from classical or mathematical attacks. However, the S-box transformation in AES is vulnerable to DPA attacks due to high power and different power traces. In this paper, we have designed and implemented a low-power LSI of 8-bit AES S-box circuit using our previously proposed charge-sharing symmetric adiabatic logic (CSSAL) for counteracting DPA attacks. Simulation and measurement results show that the proposed CSSAL S-box performs high security merit at lower frequency region; and therefore, the CSSAL is securely applicable for low-power crypto devices that operate at low frequency speed, such as smart cards, RFID tags and other battery-powered embedded systems for Internet of Things application.

Keywords: DPA, CSSAL, adiabatic, low-power, cryptography, AES.